- trench-etch technique
- метод витравлення (ізолюючих) канавок
English-Ukrainian dictionary of microelectronics. 2013.
trench-etch technique
Смотреть что такое "trench-etch technique" в других словарях:
Shallow trench isolation — (STI), also known as Box Isolation Technique , is an integrated circuit feature which prevents electrical current leakage between adjacent semiconductor device components. STI is generally used on CMOS process technology nodes of 250 nanometers… … Wikipedia
Multiple patterning — is a class of technologies developed for photolithography to enhance the feature density. The simplest case of multiple patterning is double patterning, where a conventional lithography process is enhanced to produce double the expected number of … Wikipedia
Etching (microfabrication) — Etching tanks used to perform Piranha, Hydrofluoric acid or RCA clean on 4 inch wafer batches at LAAS technological facility in Toulouse, France Etching is used in microfabrication to chemically remove layers from the surface of a wafer during… … Wikipedia
Deep reactive-ion etching — (DRIE) is a highly anisotropic etch process used to create deep penetration, steep sided holes and trenches in wafers, with aspect ratios of 20:1 or more. It was developed for microelectromechanical systems (MEMS), which require these features,… … Wikipedia
line — I n 1. rule, bar, score, underline, underscore, hairline; mark, stroke, streak, dash, hyphen, virgule, diagonal; marking, inscription, inscript, engraving, incision; scratch, notch, slash, etch, hatching. 2. band, stripe, strip, belt, zone, layer … A Note on the Style of the synonym finder
Chemical-mechanical planarization — Chemical Mechanical Polishing/Planarization is a process of smoothing surfaces with the combination of chemical and mechanical forces. It can be thought of as a hybrid of chemical etching and free abrasive polishing. Contents 1 Description 2… … Wikipedia
LOCOS — LOCOS, kurz für Local Oxidation of Silicon (dt. »lokale Oxidation von Silicium«, ist in der Halbleitertechnik ein Verfahren zur elektrischen Isolation von Bauelementen (meist Transistoren). Dafür wird der Silicium Wafer an ausgewählten Stellen… … Deutsch Wikipedia
LOCOS-Prozess — LOCOS, kurz für englisch Local Oxidation of Silicon (dt. »lokale Oxidation von Silicium«, ist in der Halbleitertechnik ein Verfahren zur elektrischen Isolation von Bauelementen (meist Transistoren). Dafür wird der Silicium Wafer an… … Deutsch Wikipedia
